All things work - fixed address logic

This commit is contained in:
2025-01-30 16:40:20 +03:00
parent 90d036c546
commit 287448a6f4
2 changed files with 37 additions and 26 deletions

View File

@ -44,7 +44,7 @@ class ControllerRefined:
def flush(self) -> None:
self.ser.write(self.buffer)
debug(self.buffer)
debug("|".join(hex(b) for b in self.buffer))
self.buffer.clear()
self.checksum = 0
debug(f'flush, checksum = {self.checksum}')
@ -101,7 +101,7 @@ class ControllerRefined:
1 + # Send number
4 + # Ox10 0x00 0x00 0x00 Bytes
4 + # Set + request code(2) + value count
len(data) # One byte per value (if no data present converts to 0)vgTt
len(data) # One byte per value (if no data present converts to 0)
+ 2 # Checksum
)
self.writeBytes(command_code.to_bytes(1, byteorder='big'))
@ -110,7 +110,10 @@ class ControllerRefined:
self.writeBytes(len(data).to_bytes(1, byteorder='big'))
for value in data:
debug(value)
self.writeBytes(value.to_bytes(1, byteorder='big'))
if type(value) is bytes:
self.writeBytes(value)
else:
self.writeBytes(value.to_bytes(1, byteorder='big'))
self.writeBytes(self.checksum.to_bytes(2, byteorder='big'))
self.flush()
@ -130,7 +133,8 @@ class ControllerRefined:
if self.readDop: # READ MODE BUG FIX TODO
values.append(self.readBytes(1)[0])
debug(f'Read bytes: {self.read_buffer}')
debug('Read bytes: ' + "|".join(hex(b) for b in self.read_buffer))
chsum = int.from_bytes(self.ser.read(2), byteorder='big')
if not self.validateChecksum(chsum):
error('Invalid checksum!')
@ -211,7 +215,7 @@ class ControllerInterface:
# DMX Addresses #
def writeAddress(self, address: int) -> bool:
try:
self.sendPacketWithResponse(self.c_codes['set'], self.targets['address'], [address], True)
self.sendPacketWithResponse(self.c_codes['set'], self.targets['address'], list(address.to_bytes(2,byteorder='big')), True)
return True
except SerialException as e:
return False
@ -220,7 +224,7 @@ class ControllerInterface:
data = self.sendPacketWithResponse(self.c_codes['get'], self.targets['address'], [])
if not data:
return -1
return data[0]
return int.from_bytes(data, byteorder='big')
# Device info #
def readDeviceInfo(self) -> tuple:
@ -250,8 +254,7 @@ class ControllerInterface:
# self.controller.readDop = False # READ MODE BUG FIX TODO
debug('Read bytes:')
for i, b in enumerate(self.controller.read_buffer):
debug(f'{i}: {b.to_bytes(1).hex()}')
debug("|".join(hex(b) for b in self.controller.read_buffer))
if not data:
return ()

View File

@ -57,7 +57,6 @@ def batch_test(functions: list[tuple[Any, int, int]], test_delay: int, controlle
passed_tests += 1
info(f'Tests of {functions[i][0].__name__}: passed {passed}/{total}')
sleep(test_delay)
info(f'Passed {passed_tests}/{len(functions)} tests')
@ -72,22 +71,31 @@ def start() -> None:
controller.connect(port)
info(f'Controller connected to {port}')
# batch_test(
# [
# (test_power_write, 30, 2),
#
# (test_power_read, 100, 0),
#
# (test_mode_read, 10, 0),
#
# (test_dev_info_read, 100, 0),
# (test_dev_info_write, 30, 1),
#
# (test_address_read, 100, 0),
# (test_address_write, 30, 1),
#
# (test_current_read, 100, 0),
# (test_current_write, 30, 1)
# ],
# 2,
# controller
# )
batch_test(
[
(test_power_write, 30, 2),
(test_power_read, 100, 0),
(test_mode_read, 10, 0),
(test_dev_info_read, 100, 0),
(test_dev_info_write, 30, 1),
(test_address_read, 100, 0),
(test_address_read, 30, 0),
(test_address_write, 30, 1),
(test_current_read, 100, 0),
(test_current_write, 30, 1)
(test_dev_info_write, 30, 2),
],
2,
controller
@ -152,7 +160,7 @@ def test_address_read(controller: c.ControllerInterface) -> bool:
def test_address_write(controller: c.ControllerInterface) -> bool:
address_min = 1
address_max = 63
address_max = 511
address = random.randint(address_min, address_max)
info(f'Writing address {address}...')
@ -165,7 +173,7 @@ def test_address_write(controller: c.ControllerInterface) -> bool:
time.sleep(1)
real = controller.readAddress()
if real:
if real != -1:
info(f'Read real address: {real}')
if address == real:
info(f'Check successful')
@ -317,8 +325,8 @@ def test_power_write(controller: c.ControllerInterface) -> bool:
info(f'Kn: {kn}')
data = (currents_controller + voltages_controller + [p_poss] + kn
# + [Amax.to_bytes(2, byteorder='big')[0], Amax.to_bytes(2, byteorder='big')[1]] # TODO баг в прошивке
+ [kn[2], kn[3]]
+ [Amax.to_bytes(2, byteorder='big')[0], Amax.to_bytes(2, byteorder='big')[1]]
# + [kn[2], kn[3]] # TODO баг в прошивке
)
info(f'Writing powers: {data}...')