Andrzej Janik a3cfa24593 Fix SPIR-V code generation for PTX special registers (#21) ...

We currently directly map PTX special registers: %ntid, %tid, etc. to SPIR-V builtins with type OpTypeVector %uint 4.
This is wrong and leads to a silent corruption, which fails e.g. Depth of Field in GeekBench

2020-12-11 21:31:08 +01:00

..

lib

Add README and rebuild .spv library

2020-11-23 21:50:21 +01:00

src

Fix SPIR-V code generation for PTX special registers (#21)

2020-12-11 21:31:08 +01:00

build.rs

Start parsing PTX text

2020-03-09 23:54:44 +01:00

Cargo.toml

Implement pass to handle .extern .shared and add parsing code for it

2020-10-18 14:46:05 +02:00