Fix all remaining problems

ptx/src/pass/convert_to_typed.rs

@@ -124,7 +124,7 @@ impl<'a, 'b> ast::VisitorMap<ast::ParsedOperand<SpirvWord>, TypedOperand, Transl
             ast::ParsedOperand::Imm(x) => TypedOperand::Imm(x),
             ast::ParsedOperand::VecMember(vec, idx) => TypedOperand::VecMember(vec, idx),
             ast::ParsedOperand::VecPack(vec) => {
-                let (type_, space) = type_space.ok_or(error_mismatched_type())?;
+                let (type_, space) = type_space.ok_or_else(|| error_mismatched_type())?;
                 TypedOperand::Reg(self.convert_vector(
                     is_dst,
                     relaxed_type_check,

ptx/src/pass/insert_implicit_conversions.rs

@@ -238,7 +238,7 @@ fn default_implicit_conversion_type(
         if should_bitcast(instruction_type, operand_type) {
             Ok(Some(ConversionKind::Default))
         } else {
-            Err(error_mismatched_type())
+            Err(TranslateError::MismatchedType)
         }
     } else {
         Ok(Some(ConversionKind::PtrToPtr))
@@ -295,14 +295,14 @@ pub(crate) fn should_convert_relaxed_dst_wrapper(
     (instruction_space, instruction_type): (ast::StateSpace, &ast::Type),
 ) -> Result<Option<ConversionKind>, TranslateError> {
     if !space_is_compatible(operand_space, instruction_space) {
-        return Err(error_mismatched_type());
+        return Err(TranslateError::MismatchedType);
     }
     if operand_type == instruction_type {
         return Ok(None);
     }
     match should_convert_relaxed_dst(operand_type, instruction_type) {
         conv @ Some(_) => Ok(conv),
-        None => Err(error_mismatched_type()),
+        None => Err(TranslateError::MismatchedType),
     }
 }
 

ptx/src/test/spirv_run/clz.spvtxt

@@ -7,20 +7,24 @@
                OpCapability Int64
                OpCapability Float16
                OpCapability Float64
-         %21 = OpExtInstImport "OpenCL.std"
+               OpCapability DenormFlushToZero
+               OpExtension "SPV_KHR_float_controls"
+               OpExtension "SPV_KHR_no_integer_wrap_decoration"
+         %22 = OpExtInstImport "OpenCL.std"
                OpMemoryModel Physical64 OpenCL
                OpEntryPoint Kernel %1 "clz"
+               OpExecutionMode %1 ContractionOff
        %void = OpTypeVoid
       %ulong = OpTypeInt 64 0
-         %24 = OpTypeFunction %void %ulong %ulong
+         %25 = OpTypeFunction %void %ulong %ulong
 %_ptr_Function_ulong = OpTypePointer Function %ulong
        %uint = OpTypeInt 32 0
 %_ptr_Function_uint = OpTypePointer Function %uint
 %_ptr_Generic_uint = OpTypePointer Generic %uint
-          %1 = OpFunction %void None %24
+          %1 = OpFunction %void None %25
           %7 = OpFunctionParameter %ulong
           %8 = OpFunctionParameter %ulong
-         %19 = OpLabel
+         %20 = OpLabel
           %2 = OpVariable %_ptr_Function_ulong Function
           %3 = OpVariable %_ptr_Function_ulong Function
           %4 = OpVariable %_ptr_Function_ulong Function
@@ -37,11 +41,12 @@
          %11 = OpLoad %uint %17 Aligned 4
                OpStore %6 %11
          %14 = OpLoad %uint %6
-         %13 = OpExtInst %uint %21 clz %14
+         %18 = OpExtInst %uint %22 clz %14
+         %13 = OpCopyObject %uint %18
                OpStore %6 %13
          %15 = OpLoad %ulong %5
          %16 = OpLoad %uint %6
-         %18 = OpConvertUToPtr %_ptr_Generic_uint %15
+         %19 = OpConvertUToPtr %_ptr_Generic_uint %15
-               OpStore %18 %16 Aligned 4
+               OpStore %19 %16 Aligned 4
                OpReturn
                OpFunctionEnd

ptx/src/test/spirv_run/cvt_s16_s8.spvtxt

@@ -7,6 +7,9 @@
                OpCapability Int64
                OpCapability Float16
                OpCapability Float64
+               OpCapability DenormFlushToZero
+               OpExtension "SPV_KHR_float_controls"
+               OpExtension "SPV_KHR_no_integer_wrap_decoration"
          %24 = OpExtInstImport "OpenCL.std"
                OpMemoryModel Physical64 OpenCL
                OpEntryPoint Kernel %1 "cvt_s16_s8"
@@ -45,9 +48,7 @@
          %32 = OpBitcast %uint %15
          %34 = OpUConvert %uchar %32
          %20 = OpCopyObject %uchar %34
-         %35 = OpBitcast %uchar %20
+         %19 = OpSConvert %ushort %20
-         %37 = OpSConvert %ushort %35
-         %19 = OpCopyObject %ushort %37
          %14 = OpSConvert %uint %19
                OpStore %6 %14
          %16 = OpLoad %ulong %5

ptx/src/test/spirv_run/cvt_s64_s32.spvtxt

@@ -7,9 +7,13 @@
                OpCapability Int64
                OpCapability Float16
                OpCapability Float64
+               OpCapability DenormFlushToZero
+               OpExtension "SPV_KHR_float_controls"
+               OpExtension "SPV_KHR_no_integer_wrap_decoration"
          %24 = OpExtInstImport "OpenCL.std"
                OpMemoryModel Physical64 OpenCL
                OpEntryPoint Kernel %1 "cvt_s64_s32"
+               OpExecutionMode %1 ContractionOff
        %void = OpTypeVoid
       %ulong = OpTypeInt 64 0
          %27 = OpTypeFunction %void %ulong %ulong
@@ -40,9 +44,7 @@
          %12 = OpCopyObject %uint %18
                OpStore %6 %12
          %15 = OpLoad %uint %6
-         %32 = OpBitcast %uint %15
+         %14 = OpSConvert %ulong %15
-         %33 = OpSConvert %ulong %32
-         %14 = OpCopyObject %ulong %33
                OpStore %7 %14
          %16 = OpLoad %ulong %5
          %17 = OpLoad %ulong %7

ptx/src/test/spirv_run/cvt_sat_s_u.spvtxt

@@ -7,9 +7,13 @@
                OpCapability Int64
                OpCapability Float16
                OpCapability Float64
+               OpCapability DenormFlushToZero
+               OpExtension "SPV_KHR_float_controls"
+               OpExtension "SPV_KHR_no_integer_wrap_decoration"
          %25 = OpExtInstImport "OpenCL.std"
                OpMemoryModel Physical64 OpenCL
                OpEntryPoint Kernel %1 "cvt_sat_s_u"
+               OpExecutionMode %1 ContractionOff
        %void = OpTypeVoid
       %ulong = OpTypeInt 64 0
          %28 = OpTypeFunction %void %ulong %ulong
@@ -42,7 +46,7 @@
          %15 = OpSatConvertSToU %uint %16
                OpStore %7 %15
          %18 = OpLoad %uint %7
-         %17 = OpBitcast %uint %18
+         %17 = OpCopyObject %uint %18
                OpStore %8 %17
          %19 = OpLoad %ulong %5
          %20 = OpLoad %uint %8

ptx/src/test/spirv_run/popc.spvtxt

@@ -7,20 +7,24 @@
                OpCapability Int64
                OpCapability Float16
                OpCapability Float64
-         %21 = OpExtInstImport "OpenCL.std"
+               OpCapability DenormFlushToZero
+               OpExtension "SPV_KHR_float_controls"
+               OpExtension "SPV_KHR_no_integer_wrap_decoration"
+         %22 = OpExtInstImport "OpenCL.std"
                OpMemoryModel Physical64 OpenCL
                OpEntryPoint Kernel %1 "popc"
+               OpExecutionMode %1 ContractionOff
        %void = OpTypeVoid
       %ulong = OpTypeInt 64 0
-         %24 = OpTypeFunction %void %ulong %ulong
+         %25 = OpTypeFunction %void %ulong %ulong
 %_ptr_Function_ulong = OpTypePointer Function %ulong
        %uint = OpTypeInt 32 0
 %_ptr_Function_uint = OpTypePointer Function %uint
 %_ptr_Generic_uint = OpTypePointer Generic %uint
-          %1 = OpFunction %void None %24
+          %1 = OpFunction %void None %25
           %7 = OpFunctionParameter %ulong
           %8 = OpFunctionParameter %ulong
-         %19 = OpLabel
+         %20 = OpLabel
           %2 = OpVariable %_ptr_Function_ulong Function
           %3 = OpVariable %_ptr_Function_ulong Function
           %4 = OpVariable %_ptr_Function_ulong Function
@@ -37,11 +41,12 @@
          %11 = OpLoad %uint %17 Aligned 4
                OpStore %6 %11
          %14 = OpLoad %uint %6
-         %13 = OpBitCount %uint %14
+         %18 = OpBitCount %uint %14
+         %13 = OpCopyObject %uint %18
                OpStore %6 %13
          %15 = OpLoad %ulong %5
          %16 = OpLoad %uint %6
-         %18 = OpConvertUToPtr %_ptr_Generic_uint %15
+         %19 = OpConvertUToPtr %_ptr_Generic_uint %15
-               OpStore %18 %16 Aligned 4
+               OpStore %19 %16 Aligned 4
                OpReturn
                OpFunctionEnd

ptx_parser/Cargo.toml

@@ -9,6 +9,7 @@ edition = "2021"
 [dependencies]
 logos = "0.14"
 winnow = { version =  "0.6.18" }
+#winnow = { version =  "0.6.18", features = ["debug"] }
 ptx_parser_macros = { path = "../ptx_parser_macros" }
 thiserror = "1.0"
 bitflags = "1.2"

ptx_parser/src/ast.rs

@@ -1109,10 +1109,11 @@ impl SetpData {
     ) -> Self {
         let flush_to_zero = match (ftz, type_) {
             (_, ScalarType::F32) => Some(ftz),
-            _ => {
+            (true, _) => {
                 state.errors.push(PtxError::NonF32Ftz);
                 None
             }
+            _ => None
         };
         let type_kind = type_.kind();
         let cmp_op = if type_kind == ScalarKind::Float {

ptx_parser/src/lib.rs

@@ -3,6 +3,7 @@ use logos::Logos;
 use ptx_parser_macros::derive_parser;
 use rustc_hash::FxHashMap;
 use std::fmt::Debug;
+use std::iter;
 use std::num::{NonZeroU8, ParseFloatError, ParseIntError};
 use winnow::ascii::dec_uint;
 use winnow::combinator::*;
@@ -397,14 +398,13 @@ fn directive<'a, 'input>(
 fn module_variable<'a, 'input>(
     stream: &mut PtxParser<'a, 'input>,
 ) -> PResult<(ast::LinkingDirective, ast::Variable<&'input str>)> {
-    (
+    let linking = linking_directives.parse_next(stream)?;
-        linking_directives,
+    let var = global_space
-        global_space
+        .flat_map(|space| multi_variable(linking.contains(LinkingDirective::EXTERN), space))
-            .flat_map(multi_variable)
+        // TODO: support multi var in globals
-            // TODO: support multi var in globals
+        .map(|multi_var| multi_var.var)
-            .map(|multi_var| multi_var.var),
+        .parse_next(stream)?;
-    )
+    Ok((linking, var))
-        .parse_next(stream)
 }
 
 fn file<'a, 'input>(stream: &mut PtxParser<'a, 'input>) -> PResult<()> {
@@ -621,7 +621,7 @@ fn statement<'a, 'input>(
         debug_directive.map(|_| None),
         terminated(
             method_space
-                .flat_map(multi_variable)
+                .flat_map(|space| multi_variable(false, space))
                 .map(|var| Some(Statement::Variable(var))),
             Token::Semicolon,
         ),
@@ -678,6 +678,7 @@ fn variable_declaration<'a, 'input>(
 }
 
 fn multi_variable<'a, 'input: 'a>(
+    extern_: bool,
     state_space: StateSpace,
 ) -> impl Parser<PtxParser<'a, 'input>, MultiVariable<&'input str>, ContextError> {
     move |stream: &mut PtxParser<'a, 'input>| {
@@ -714,7 +715,7 @@ fn multi_variable<'a, 'input: 'a>(
             _ => None,
         };
         if let Some(ref dims) = array_dimensions {
-            if dims[0] == 0 {
+            if !extern_ && dims[0] == 0 {
                 return Err(ErrMode::from_error_kind(stream, ErrorKind::Verify));
             }
         }
@@ -746,13 +747,16 @@ fn array_initializer<'a, 'input: 'a>(
         delimited(
             Token::LBrace,
             separated(
-                array_dimensions[0] as usize..=array_dimensions[0] as usize,
+                0..=array_dimensions[0] as usize,
                 single_value_append(&mut result, type_),
                 Token::Comma,
             ),
             Token::RBrace,
         )
         .parse_next(stream)?;
+        // pad with zeros
+        let result_size = type_.size_of() as usize * array_dimensions[0] as usize;
+        result.extend(iter::repeat(0u8).take(result_size - result.len()));
         Ok(result)
     }
 }
@@ -1079,11 +1083,11 @@ impl<Ident> ast::ParsedOperand<Ident> {
         fn vector_operand<'a, 'input>(
             stream: &mut PtxParser<'a, 'input>,
         ) -> PResult<Vec<&'input str>> {
-            let (_, r1, _, r2) =
+            let (_, r1, _, r2) = (Token::LBrace, ident, Token::Comma, ident).parse_next(stream)?;
-                (Token::LBracket, ident, Token::Comma, ident).parse_next(stream)?;
+            // TODO: parse .v8 literals
             dispatch! {any;
-                Token::LBracket => empty.map(|_| vec![r1, r2]),
+                Token::RBrace => empty.map(|_| vec![r1, r2]),
-                Token::Comma => (ident, Token::Comma, ident, Token::LBracket).map(|(r3, _, r4, _)| vec![r1, r2, r3, r4]),
+                Token::Comma => (ident, Token::Comma, ident, Token::RBrace).map(|(r3, _, r4, _)| vec![r1, r2, r3, r4]),
                 _ => fail
             }
             .parse_next(stream)